| Items | General Specifications |
| Phase modulation frequency(Data rate) | 4.7 ~ 7.0 Gb/s |
| Programmable data rate | 4.7, 5.0, 5.3, 6.0, 6.5, 7.0 Gb/s |
| PRBS Patterns | 2^n -1 (n = 7, 8, 9, 10, 11, 12) |
| Data output amplitude (single-ended) | 500mVpp |
| Data output r ise/fall time (20% to 80%) | Typ. 40ps |
| Data output jitter | 1.0 ps rms typical |
| Divided clock output | Internal clock / 16, 600mVpp |
| Data output external interface | 50Ω , Differential, 2.92mm K-type connector |
| Processor | FPGA |
| Size | 94 x 60 x 20 mm^3 |
| Operating temperature | +0 to +50 °C |
| Storage temperature | - 40 to +70 °C |
| Power requirements | +5V DC, 2A (AC Adaptor or Connector provided) |
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